Peer Review History: Analytical Methods for Detecting and Eliminating the Static Hazard in Combinational Logic Circuits


(1) Dr. Dariusz Jacek Jakóbczak, Koszalin University of Technology, Poland.

Approved by:

(1) Dr. Francisco Welington de Sousa Lima , Universidade Federal do Piauí, Teresina, Brazil.


(1) Kosaraju Sivani, Kakatiya Institute of Technology & Science, India.

(2) P.Pattunnarajam, Anna University, India.

Additional Reviewers:

Additional Reviewers: (Comments received after deadline)

Peer Review History:

Peer review report_1 (Kosaraju Sivani, India) | File 1 | NA

Peer review report_2 (P.Pattunnarajam, India) | File 1 | NA

Comment_Academic_Editor | File 1 | NA

Comment_Book_Editor | File 1 | NA